کد:
void SDRAMInit( void )
{
volatile uint32_t i;
volatile unsigned long Dummy;
LPC_IOCON->P2_16 = 0x21;
LPC_IOCON->P2_17 = 0x21;
LPC_IOCON->P2_18 = 0x21;
LPC_IOCON->P2_19 = 0x21;
LPC_IOCON->P2_20 = 0x21;
LPC_IOCON->P2_24 = 0x21;
LPC_IOCON->P2_28 = 0x21;
LPC_IOCON->P2_29 = 0x21;
LPC_IOCON->P2_30 = 0x21;
LPC_IOCON->P2_31 = 0x21;
LPC_IOCON->P3_0 = 0x21;
LPC_IOCON->P3_1 = 0x21;
LPC_IOCON->P3_2 = 0x21;
LPC_IOCON->P3_3 = 0x21;
LPC_IOCON->P3_4 = 0x21;
LPC_IOCON->P3_5 = 0x21;
LPC_IOCON->P3_6 = 0x21;
LPC_IOCON->P3_7 = 0x21;
LPC_IOCON->P3_8 = 0x21;
LPC_IOCON->P3_9 = 0x21;
LPC_IOCON->P3_10 = 0x21;
LPC_IOCON->P3_11 = 0x21;
LPC_IOCON->P3_12 = 0x21;
LPC_IOCON->P3_13 = 0x21;
LPC_IOCON->P3_14 = 0x21;
LPC_IOCON->P3_15 = 0x21;
LPC_IOCON->P3_16 = 0x21;
LPC_IOCON->P3_17 = 0x21;
LPC_IOCON->P3_18 = 0x21;
LPC_IOCON->P3_19 = 0x21;
LPC_IOCON->P3_20 = 0x21;
LPC_IOCON->P3_21 = 0x21;
LPC_IOCON->P3_22 = 0x21;
LPC_IOCON->P3_23 = 0x21;
LPC_IOCON->P3_24 = 0x21;
LPC_IOCON->P3_25 = 0x21;
LPC_IOCON->P3_26 = 0x21;
LPC_IOCON->P3_27 = 0x21;
LPC_IOCON->P3_28 = 0x21;
LPC_IOCON->P3_29 = 0x21;
LPC_IOCON->P3_30 = 0x21;
LPC_IOCON->P3_31 = 0x21;
LPC_IOCON->P4_0 = 0x21;
LPC_IOCON->P4_1 = 0x21;
LPC_IOCON->P4_2 = 0x21;
LPC_IOCON->P4_3 = 0x21;
LPC_IOCON->P4_4 = 0x21;
LPC_IOCON->P4_5 = 0x21;
LPC_IOCON->P4_6 = 0x21;
LPC_IOCON->P4_7 = 0x21;
LPC_IOCON->P4_8 = 0x21;
LPC_IOCON->P4_9 = 0x21;
LPC_IOCON->P4_10 = 0x21;
LPC_IOCON->P4_11 = 0x21;
LPC_IOCON->P4_12 = 0x21;
LPC_IOCON->P4_13 = 0x21;
LPC_IOCON->P4_14 = 0x21;
LPC_IOCON->P4_25 = 0x21;
LPC_IOCON->P3_22 = 0x21;
//
LPC_SC->PCONP |= 0x00000800;
LPC_SC->EMCDLYCTL = 0x00001010;
LPC_EMC->Control = 0x00000001;
LPC_EMC->Config = 0x00000000;
PINSEL_ConfigPin(2,14,1);
PINSEL_ConfigPin(2,15,1);
PINSEL_ConfigPin(2,16,1);
PINSEL_ConfigPin(2,17,1);
PINSEL_ConfigPin(2,18,1);
PINSEL_ConfigPin(2,19,1);
PINSEL_ConfigPin(2,20,1);
PINSEL_ConfigPin(2,21,1);
PINSEL_ConfigPin(2,22,1);
PINSEL_ConfigPin(2,23,1);
PINSEL_ConfigPin(2,24,1);
PINSEL_ConfigPin(2,25,1);
PINSEL_ConfigPin(2,26,1);
PINSEL_ConfigPin(2,27,1);
PINSEL_ConfigPin(2,28,1);
PINSEL_ConfigPin(2,29,1);
PINSEL_ConfigPin(2,30,1);
PINSEL_ConfigPin(2,31,1);
for(i = 0; i < 32; i++)
{
PINSEL_ConfigPin(3,i,1);
PINSEL_ConfigPin(4,i,1);
}
// EMC_Init();
// Init SDRAM controller
LPC_SC->PCONP |= 0x00000800;
/*Init SDRAM controller*/
LPC_SC->EMCDLYCTL |= (8<<0);
/*Set data read delay*/
LPC_SC->EMCDLYCTL |=(8<<8);
LPC_SC->EMCDLYCTL |= (0x08 <<16);
LPC_EMC->Control =1;
LPC_EMC->DynamicReadConfig = 1;
LPC_EMC->DynamicRasCas0 = 0;
LPC_EMC->DynamicRasCas0 |=(3<<8);
LPC_EMC->DynamicRasCas0 |= (3<<0);
LPC_EMC->DynamicRP = P2C(SDRAM_TRP);
LPC_EMC->DynamicRAS = P2C(SDRAM_TRAS);
LPC_EMC->DynamicSREX = P2C(SDRAM_TXSR);
LPC_EMC->DynamicAPR = SDRAM_TAPR;
LPC_EMC->DynamicDAL = SDRAM_TDAL+P2C(SDRAM_TRP);
LPC_EMC->DynamicWR = SDRAM_TWR;
LPC_EMC->DynamicRC = P2C(SDRAM_TRC);
LPC_EMC->DynamicRFC = P2C(SDRAM_TRFC);
LPC_EMC->DynamicXSR = P2C(SDRAM_TXSR);
LPC_EMC->DynamicRRD = P2C(SDRAM_TRRD);
LPC_EMC->DynamicMRD = SDRAM_TMRD;
// 13 row, 9 - col, SDRAM
LPC_EMC->DynamicConfig0 = 0x0004680;
// LPC_EMC->DynamicConfig1 = 0x0004680;
// LPC_EMC->DynamicConfig2 = 0x0004680;
// LPC_EMC->DynamicConfig3 = 0x0004680;
// JEDEC General SDRAM Initialization Sequence
// DELAY to allow power and clocks to stabilize ~100 us
// NOP
LPC_EMC->DynamicControl = 0x0183;
for(i= 200*30; i;i--);
// PALL
LPC_EMC->DynamicControl = 0x0103;
LPC_EMC->DynamicRefresh = 2;
for(i= 256; i; --i); // > 128 clk
LPC_EMC->DynamicRefresh = P2C(SDRAM_REFRESH) >> 4;
// COMM
LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */
Dummy = *((volatile uint32_t *)(SDRAM_BASE_ADDR | (0x32<<13)));
// NORM
LPC_EMC->DynamicControl = 0x0000;
LPC_EMC->DynamicConfig0 |=(1<<19);
// LPC_EMC->DynamicConfig1 |=(1<<19);
// LPC_EMC->DynamicConfig2 |=(1<<19);
// LPC_EMC->DynamicConfig3 |=(1<<19);
for(i = 100000; i;i--);
}