The STM32F756xx devices are based on the high-performance ARM
®Cortex®-M7 32-bit RISC core operating at up to 200 MHz frequency. The Cortex®-M7 core features a single floating point unit (SFPU) precision which supports all ARM® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.
The STM32F756xx devices incorporate high-speed embedded memories with Flash memory up to 1 Mbyte, 320 KB of SRAM (including 64 KB of Data TCM RAM for critical real time data), 16 KB of instruction TCM RAM (for critical real time routines), 4 KB of backup SRAM available in the lowest power modes, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses, a 32-bit multi-AHB bus matrix and a multi layer AXI interconnect supporting internal and external memories access.
All devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers, a true random number generator (RNG), and a cryptographic acceleration cell. They also feature standard and advanced communication interfaces.
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Data Brief
Key Features
Core: ARM® 32-bit Cortex®-M7 CPU with FPU, adaptive real-time accelerator (ART Accelerator™) and L1 cache: 4KB data cache and 4KB instruction cache, allowing 0-wait state execution from embedded Flash memory and external memories, frequency up to 200 MHz, MPU, 428 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions.
Memories
Up to 1MB of Flash memory
SRAM: 320KB (including 64KB of data TCM RAM for critical real time data) + 16KB of instruction TCM RAM (for critical real time routines) + 4KB of backup SRAM (available in the lowest power modes)
Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
Dual mode Quad SPI
LCD parallel interface, 8080/6800 modes
LCD-TFT controller up to XGA resolution with dedicated Chrom-ART Accelerator™ for enhanced graphic content creation (DMA2D)
Clock, reset and supply management
1.7 V to 3.6 V application supply and I/Os
POR, PDR, PVD and BOR
Dedicated USB power
4-to-26 MHz crystal oscillator
Internal 16 MHz factory-trimmed RC (1% accuracy)
32 kHz oscillator for RTC with calibration
Internal 32 kHz RC with calibration
Sleep, Stop and Standby modes
VBATsupply for RTC, 32×32 bit backup registers + 4KB backup SRAM
3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
2×12-bit D/A converters
General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
Up to 18 timers: up to thirteen 16-bit (1x low power 16-bit timer available in stop mode) and two 32-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input. All 15 timers running up to 200 MHz. 2x watchdogs, SysTick timer
Debug mode
SWD & JTAG interfaces
Cortex®-M7 Trace Macrocell™
Up to 168 I/O ports with interrupt capability
Up to 164 fast I/Os up to 100 MHz
Up to 166 5 V-tolerant I/Os
Up to 25 communication interfaces
Up to 4× I2C interfaces (SMBus/PMBus)
Up to 4 USARTs/4 UARTs (12.5 Mbit/s, ISO7816 interface, LIN, IrDA, modem control)
Up to 6 SPIs (up to 50 Mbits/s), 3 with muxed simplex I2S for audio class accuracy via internal audio PLL or external clock
2 x SAI (serial audio interface)
2 × CAN (2.0B Active) and SDMMC interface
SPDIF-IN interface
HDMI-CEC
Advanced connectivity
USB 2.0 full-speed device/host/OTG controller with on-chip PHY
USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII
8- to 14-bit parallel camera interface up to 54 Mbytes/s
Cryptographic acceleration: hardware acceleration for AES 128, 192, 256, Triple DES, HASH (MD5, SHA-1, SHA-2), and HMAC
True random number generator
CRC calculation unit
RTC: subsecond accuracy, hardware calendar
96-bit unique ID
نوشته اصلی توسط alishekarriz
STM32F756NGPreview
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